Welcome! We are the Parallel Programming Laboratory.

Our goal is to develop technology that improves performance of parallel applications while also improving programmer productivity. We aim to reach a point where, with our freely distributed software base, complex irregular and dynamic applications can (a) be developed quickly and (b) perform scalably on machines with thousands of processors.

Processor virtualization is one of our core techniques: the programmer divides the computation into a large number of entities, which are mapped to the available processors by an intelligent runtime system. This separation of concerns between programmers and the system is key to attaining both our goals together.

Using an Adaptive HPC RTS to Reconfigure the Cache Hierarchy


The cache hierarchy often consumes a large portion of a processor’s energy. To save energy in HPC environments, this paper proposes software-controlled reconfiguration of the cache hierarchy with an adaptive runtime system. Our approach addresses the two major limitations associated with other methods that reconfigure the caches: predicting the application’s future and finding the best cache hierarchy configuration. Our approach uses formal language theory to express the application’s pattern and help predict its future. Furthermore, it uses the prevalent Single...