Welcome! We are the Parallel Programming Laboratory.
Our goal is to develop technology that improves performance of parallel applications while also improving programmer productivity. We aim to reach a point where, with our freely distributed software base, complex irregular and dynamic applications can (a) be developed quickly and (b) perform scalably on machines with thousands of processors.
Processor virtualization is one of our core techniques: the programmer divides the computation into a large number of entities, which are mapped to the available processors by an intelligent runtime system. This separation of concerns between programmers and the system is key to attaining both our goals together.
Charm++ Case Study: Shared Memory Programming
Modern processors are fast reaching the limits of CPU frequency scaling. In
their continued bid to increase performance, chip vendors have now made
multicore processors commonplace. However, the means to program these
increasingly powerful processors have not yet matured. Traditional languages
and frameworks for programming multicore systems either provide very low-level
constructs, or a performance model that is not well-matched with the underlying
hardware.
In recent work we have explored an alternative to these approaches, namely...
Recent Activity
- Jetley and Kale receive best paper award at HiPC 2011
- PPL Awarded 1st Place in HPC Challenge Class 2
- PPL Submission Chosen As Finalist for HPC Challenge
- Scaling to 100 Million Atoms Video
- PPLers Langer and Menon chosen as Siebel Scholars
- Bhatele gets the 2011 David Kuck outstanding PhD thesis award
- Charm++ Tutorial Presented at Chinese Academy of Sciences
- PPL Undergraduate Researcher Awarded CRA Honorable Mention
Recent Publications
- Applying graph partitioning methods in measurement-based dynamic load balancing
- A parallel algorithm for 3-D particle tracking and Lagrangian trajectory reconstruction
- Comparing the Power and Performance of Intel’s SCC to State-of-the-Art CPUs and GPUs
- Simulation-based Performance Analysis and Tuning for Future Supercomputers
- Dense LU Factorization on Multicore Supercomputer Nodes
















