PPL and Charm++ Events at
Please attend Charm++ BoF: Wed. Nov. 16 12:15-1:15PM 250-E | Visit
Supercomputing 2016: The 28th Annual International Conference for High Performance Computing, Networking, Storage and Analysis (SC16) will be in Salt Lake City, Utah November 13-18, 2016.
For Charm++, there will be BoF on Charm++ Wednesday noon, and Charmworks, a startup that commercially supports Charm++ will be exhibiting in booth 4354. In addition, there will be several papers at the main conference and workshops that are relevant to the Charm++ community, listed below.
Monday, November 14th
|11:00AM - 11:30AM||E2SC Workshop Paper||Neural Network-Based Task Scheduling with Preemptive Fan Control||Bilge Acun, Eun Kyung Lee, Yoonho Park and Laxmikant Kale||255-D|
Tuesday, November 15th
|11:00AM - 11:30AM||Technical Paper||Evaluating HPC Networks via Simulation of Parallel Workloads||Nikhil Jain, Abhinav Bhatele, Sam White, Todd Gamblin and Laxmikant V. Kale||355-BC|
|4:30PM - 5:00 PM||Technical Paper||FlipBack: Automatic Targeted Protection Against Silent Data Corruption||Xiang Ni and Laxmikant V. Kale||355-D|
|5:15PM - 7:00PM||SRC Poster||13. Mapping Applications on Irregular Allocations||Seonmyeong Bak||Lower Lobby Concourse, Exhibit Hall E - Booth 104|
|5:15PM - 7:00PM||Poster||74. Meta-Balancer: Automating Load Balancing Decisions||Harshitha Menon, Kavitha Chandrasekar and Laxmikant V. Kale||Lower Lobby Concourse, Exhibit Hall E - Booth 104|
Wednesday, November 16th
|12:15PM - 1:15PM||Birds-of-a-Feather||Charm++ and AMPI: Adaptive and Asynchronous Parallel Programming||Phil Miller, Laxmikant V. Kale and Sam White||250-E|
|12:15PM - 1:15PM||Lightning Talk at Birds-of-a-Feather||Optimizing Performance on Many-Core Processors: Unleashing the Power of the Intel® Xeon Phi and Beyond||Kavitha Chandrasekar||355-F|
Friday, November 18th
|9:15AM - 10:05AM||COMHPC Workshop Paper||Topology and Affinity-Aware, Hierarchical, and Distributed Load Balancing in Charm++ (9:35-9:55)||Francois Tessier, Emmanuel Jeannot and Guillaume Mercier||355-D|
|10:30AM - 12:10PM||ESPM2 Workshop Paper||Metaprogramming-Enabled Parallel Execution of Apparently Sequential C++ Code||David Hollman, Jannine Bennett, Hemanth Kolla, Jonathan Lifflander, Nicole Slattengren and Jeremiah Wilke||155-E|
|12:10PM - 12:30PM||ESPM2 Workshop Paper||Runtime Coordinated Heterogeneous Tasks in Charm++||Michael Robson, Ronak Buch and Laxmikant Kale||155-E|
About PPL/Charm++ at SC16
The Parallel Programming Laboratory (PPL) at the University of Illinois at Urbana Champaign is a research group that has been creating innovative solutions in HPC for over 25 years. Adaptive runtime systems is the core research focus of PPL. The research results are embodied in the Charm++ parallel programming system and the Adaptive MPI library, which have been used to develop many highly scalable applications, including NAMD (biophysics), OpenAtom (materials), ChaNGa (astronomy), EpiSimdemics (simulation of contagion spread), etc.
Charm++ is a strong contender for an exascale programming model, with all the adaptive features built into Charm++, including dynamic load balancing, power/energy/temperature management, and resilience.
PPL will host a Birds-of-a-Feather Session on "Charm++ and AMPI: Adaptive and Asynchronous Parallel Programming." This is an ideal opportunity to learn more about how Charm++ is used in practice, see how it's growing, and influence its future direction. The session will take place from 12:15PM – 1:15PM on Wednesday, November 16th.
Many PPL members will be in attendance at the conference. We look forward to an exciting week at SC16.
At the NCSA booth and the PCI booth, PPL members will show Charm++ Fault Tolerance demo. In this demo, we will show the online failure handling using Charm++. After killing one node by powering it off, you could see the visualization of the demo program pauses due to restart and quickly proceeds from the last checkpoint.